Design and Implementation of Viterbi Decoder with FPGAs
A Hybrid Neuro-Fuzzy System for Adaptive Vehicle Separation Control
Scalability of Programmable FIR Digital Filters
A Radix 2 Shared Division/Square Root Algorithm and its VLSI Architecture*
An Orthogonal Time-Frequency Extraction Approach to 2D Systolic Architecture for 1D DFT Computation