An Efficient Architecture for the In-Place Fast Cosine Transform

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The two-dimensional discrete cosine transform (2D-DCT) is at the core of image encoding and compression applications. We present a new architecture for the 2D-DCT which is based on row-column decomposition. An efficient architecture to compute the one-dimensional fast direct (1D-DCT) and inverse cosine (1D-IDCT) transforms, which is based in reordering the butterflies after their computation, is also discussed. The architectures designed exploit locality, allowing pipelining between stages and saving memory (in-place). The result is an efficient architecture for high speed computation of the (1D, 2D)-DCT that significantly reduces the area required for VLSI implementation.

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