Parallel Implementation of a Fast Third-Order Volterra Digital Filter

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This paper presents the parallel implementation and performance evaluation of a fast third-order Volterra digital filtering algorithm mapped onto an AT&T DSP-3 parallel processor. Five different implementations are considered. A timing analysis of the parallel implementations is presented. Based on execution time measurement, we determine the important factors affecting the performance of the filtering algorithm. Reservation tables are used to illustrate the different implementations. Speed-up results indicate that the “time-skewing” implementation has the highest throughput. An application to nonlinear communication channel equalization is also presented.

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