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Guest Editor's Introduction
List of Reviewers
Efficient Wordlength Reduction Techniques for DSP Applications
A Hierarchical Block-Floating-Point Arithmetic
DCT-Domain Embedded Memory Compression for Hybrid Video Coders
Design and Implementation of a Low Complexity VLSI Turbo-Code Decoder Architecture for Low Energy Mobile Wireless Communications
Partitioning Analog and Digital Processing in Mixed-Signal Systems
Linear QR Architecture for a Single Chip Adaptive Beamformer
Multidimensional Exploration of Software Implementations for DSP Algorithms
DG2VHDL