A Low Power Approach to Floating Point Adder Design for DSP Applications*
Minimizing Average Schedule Length under Memory Constraints by Optimal Partitioning and Prefetching
A Single Clocked Adiabatic Static Logic—A Proposal for Digital Low Power Applications
Efficient Recursive Digital Filters using Combined Look-Ahead Denominator Distribution and Numerator Decomposition
A Compiler-Friendly RISC-Based Digital Signal Processor Synthesis and Performance Evaluation