A Programmable Parallel VLSI Architecture for 2-D Discrete Wavelet Transform
A Parallel Architecture for the 2-D Discrete Wavelet Transform with Integer Lifting Scheme
Distributed Memory Parallel Architecture Based on Modular Linear Arrays for 2-D Separable Transforms Computation
Parallel, Pipelined and Folded Architectures for Computation of 1-D and 2-D DCT in Image and Video Codec
Multimedia Execution Hardware Accelerator*
Scalable Linear Array Architecture with Data-Driven Control for Ultrahigh-Speed Vector Quantization
A Parallel VLSI Video/Communication Controller
A High Speed VLSI Architecture for Handwriting Recognition