Guest Editorial
Further Reducing the Redundancy of a Notation Over a Minimally Redundant Digit Set
Fast CORDIC Algorithm Based on a New Recoding Scheme for Rotation Angles and Variable Scale Factors
On-the-Fly Range Reduction*
Error Analysis of the Kmetz/Maenner Algorithm
Multilevel Reverse-Carry Addition
Reducing Switching Activity of Subtraction via Variable Truncation of the Most-Significant Bits
Energy Efficient Adiabatic Multiplier-Accumulator Design
Digit-Serial Complex-Number Multipliers on FPGAs
A Radix-4 New Svobota-Tung Divider with Constant Timing Complexity for Prescaling
Implementation of the Exponential Function in a Floating-Point Unit*
An Efficient IDCT Processor Design for HDTV Applications
An Integrated Systolic Array Design for Video Compression
Implementation of RNS-Based Distributed Arithmetic Discrete Wavelet Transform Architectures Using Field-Programmable Logic
A Fully-Pipeline Linear Systolic Architecture for Modular Multiplier in Public-Key Crypto-Systems
An RNS Architecture for Quasi-Chaotic Oscillators