Power Analysis of a General Convolution Algorithm Mapped on a Linear Processor Array
CORDIC Processor for Variable-Precision Interval Arithmetic
Fractional Rate Dataflow Model for Efficient Code Synthesis
Combined Application of Data Transfer and Storage Optimizing Transformations and Subword Parallelism Exploitation for Power Consumption and Execution Time Reduction in VLIW Multimedia Processors
Design Considerations for Energy-Efficient Radios in Wireless Microsensor Networks
A Low-Power Heterogeneous Multiprocessor Architecture for Audio Signal Processing
A Low Power Architecture for HASM Motion Tracking
Instruction Scheduling for Low Power
Net Clustering Based Constructive and Iterative Improvement Approaches for Macro-Cell Placement